ISQED’23 Call for Papers
Conference Highlights AI/ML & Electronic Design, Security, IoT, Autonomous Vehicles, Quantum Computing
SAN JOSE, CALIFORNIA, UNITES STATES, October 24, 2022 /EINPresswire.com/ — Symposium on Quality Electronic Design (ISQED) is asserting the ultimate paper submission deadline for 2023 occasion to be Nov. 11, 2022. All papers submitted by this week, can have one additional week to submit the revised work. ISQED is an internationally respected convention, to be technically sponsored by IEEE CASS, IEEE EDS, and IEEE Reliability Societies, and in cooperation with ACM/SigDA. The convention is deliberate to be held on April 5-7, 2023, in San Francisco, CA, USA.
A partial record of matters of curiosity contains:
Hardware and System Security
Attacks and countermeasures together with however not restricted to side-channel assaults, reverse engineering, tampering, and Trojans
Hardware-based safety primitives together with PUFs, TRNGs and ciphers
Security, privateness, belief protocols, and trusted info stream
Ensuring belief utilizing untrusted instruments, IP, fashions and manufacturing
Secure {hardware} architectures Secure reminiscence methods
Post-quantum safety primitives
Security challenges and alternatives of rising nanoscale units
IoT and cyber-physical system safety
Any different matters associated to {hardware} safety
Electronic Design Automation Tools and Methodologies
EDA and bodily design instruments, processes, methodologies, and flows
Design instruments for evaluation/ tolerance of variation, growing old, and soft-errors
Design and upkeep of arduous and tender IP blocks
Challenges and options of integrating, testing, qualifying and manufacturing IP blocks from a number of distributors
EDA for non-traditional issues corresponding to sensible energy grid and photo voltaic vitality
EDA instruments and methodologies for 3D integrations, and superior packaging
Modeling and Simulation of Semiconductor Processes and Devices (TCAD)
CAD for bio-inspired and neuromorphic methods
EDA instruments, methodologies and functions for Photonics units, circuit and system design
EDA for MEMS Any different matters associated design automation instruments and methodologies
Design Test and Verification
Hardware and software program formal-, assertion-, and simulation-based design verification strategies
All areas of DFT, ATE and BIST for digital designs, analog/mixed-signal IC’s, SoC’s, and reminiscences
Test synthesis and synthesis for testability
Fault analysis, IDDQ check, novel check strategies, effectiveness of check strategies, fault fashions and ATPG, and DPPM prediction
SoC/IP testing methods Design methodologies coping with the hyperlink between testability and manufacturing
Hardware/software program co-verification
Advanced methodologies, testbenches, and flows (e.g., UVM, HDLs, HVLs)
Formal and semi-formal verification and validation strategies
Safety and safety in verification and validation New strategies and instruments supporting purposeful security and safety
Self-checking testbenches in analog verification
Any different matters associated to design check and verification
Emerging Device and Process Technologies and Applications
Design, simulation and modeling of rising applied sciences
Design, simulation and modeling of rising non-volatile reminiscence and logic, corresponding to STT-RAM, PC-RAM, R-RAM, and Memristors
Application of rising units for storage and computation together with however not restricted to cognitive, neuromorphic, or quantum computing
Qubit applied sciences and quantum computing Specialty applied sciences corresponding to MEMs, NEMs
Novel or rising stable state nano-electronic units and ideas
Design and Technology Co-Optimization
Optimization-based methodologies that handle the interplay between design ({custom}, semi-custom, ASIC, FPGA, RF, reminiscence, and so on.)
Advanced-node manufacturing strategies corresponding to a number of patterning, EUV lithography, DSA lithography,
Advanced interconnect (e.g., air hole for native interconnect, Si photonics, and so on.).
Modeling, evaluation, and optimization of expertise implications on efficiency metrics like energy consumption, timing, space, and price.
Design strategies and instruments to enhance yield and manufacturability.
Any different matters associated to rising system applied sciences and functions
Circuit Design, 3D Integration and Advanced Packaging
Low energy, high-performance, and strong design of logic, reminiscence, analog, interconnect, RF, programmable logic, and FPGA circuits
Techniques for leakage management, energy optimization, and energy administration
Analog circuit design together with however not restricted to all-digital PLLs and DLLs, ADC’s and DAC’s
Adaptive and resilient digital circuits and methods
On-chip course of, voltage, temperature, and growing old sensors and monitoring
Hardware design for IoT sensors and actuators together with digital logic, reminiscence design, wi-fi communications, vitality harvesting, sign processing, and energy administration
Innovative packaging applied sciences together with 3D IC, 2.5D or interposer, and multi-chip module and their influence on design
Design strategies, methodologies and flows for vertically built-in circuits/chips
Modeling and mitigation of system interactions for 3D ICs
Design of die-to-die interfaces in 3D/2.5D ICs
Design-for-testability and system-level design points in 3D/2.5D
Die-package co-design
Any different matters associated to circuit design, 3D integration and superior packaging
System-level Design and Methodologies
Methods and instruments aiming at high quality of methods together with multi-core processors, graphics processors embedded methods, SoC, novel accelerator designs, and heterogeneous structure designs
System-level trade-off evaluation and multi-objective (e.g. yield, energy, delay, space, and so on.) optimization
System stage energy and thermal administration
Exploration of affect of rising applied sciences on the system stage design
System stage modeling and simulation to characterize results of course of, voltage, temperature, and growing old on energy, efficiency, and reliability
Cyber-Physical Systems – Design, Methodologies & Tools
HW/SW co-design, co-simulation, co-optimization, and co-exploration
HW/SW prototyping and emulation on FPGAs
Micro-architectural transformation
System communication structure
Application pushed heterogeneous computing platforms
Network-on-chip design methodologies
Any different matters associated to system stage design and methodologies
Cognitive Computing Hardware
Neuromorphic computing and non-Von Neumann architectures
Hardware and structure for neural networks and system-level design for (deep) neural computing Neural community acceleration strategies together with GPGPU, FPGA and devoted ASICs
Safe and safe machine studying Hardware accelerators for Artificial Intelligence Cognitive-inspired computing fundamentals
Cognitive-inspired computing methods
Cognitive-inspired computing with huge knowledge
Cognitive-inspired clever interplay AI-assisted cognitive computing approaches
Brain evaluation for cognitive-inspired computing Internet of cognitive Things
Cognitive surroundings, sensing and knowledge
Cognitive robots and brokers Security subject in cognitive-inspired computing
Test-bed, prototype implementation and functions
Any different matters associated to cognitive computing {hardware}
Submission of Papers (Regular, WIP, Special Sessions)
For any details about submission course of seek advice from: https://www.isqed.org/English/Conference/Call_for_Papers.html
Lana Dunn
ISQED
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