San Jose, Oct. 10, 2022 (GLOBE NEWSWIRE) — Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a number one provider of excessive effectivity, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, broadcasts the return of its annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel. The RISC-V CON program will embody keynotes from Intel Foundry Services, Intel RISC-V Ventures, SoC developer Sonical, and Andes together with technical talks and panel from RISC-V ecosystem companions together with Crypto Quantique, Green Hills Software, IAR Systems and Imperas.
Andes Technology President & CTO, Dr. Charlie Su, will start the program at 10:00 AM along with his presentation, “Expanding the RISC-V Horizon.” “It is no secret that RISC-V architecture is growing, its membership is rising, and the RISC-V ecosystem is flourishing,” Dr. Su noticed. “All in an unprecedented speed. In my talk, I will examine the expanding range of applications RISC-V serves and how Andes RISC-V solutions help drive this open instruction set architecture’s fast adoptions. I will also talk about Andes RISC-V cores coming on the horizon.”
Keynotes from Bob Brennan, Vice President of Intel Foundry Services and Vijay Krishnan, General Manager, RISC-V Ventures of Intel will respectively deal with how RISC-V prospers in a brand new foundry period and the way Intel permits RISC-V for AIoT and edge functions. Sonical will current their subsequent technology of hearable units utilizing RISC-V. In addition, RISC-V ecosystem talks from Crypto Quantique, Green Hills Software and Imperas will introduce their optimized RISC-V options and instruments good for functions together with IoT, useful security, safety and extra.
The convention program runs from 10:00 AM to 4:05 PM with lunch and a night reception included. During the reception, prize drawings will award private electronics containing Andes RISC-V CPU IP to fortunate attendees. Dan Nenni, founder of SemiWiki.com, the open discussion board for semiconductor professionals, will reasonable the “RISC-V Ecosystem Panel: From Edge to Cloud“ that may start instantly after lunch. The convention is free and it’s open to certified registrants akin to design engineers, engineering managers, advertising individuals and business improvement personnel. The exhibition accompanying the convention program will showcase MPU improvement board from Renesas, AI improvement equipment with digital camera module from Canaan, high-performance industrial-grade microcontrollers from HPMicro, Bluetooth improvement equipment from Telink and Arduino-compatible boards containing RISC-V CPU IP in addition to Sonical detailing their Headphone 3.0., the subsequent technology of hearable units, that unlocks untapped useful resource of biometric information. To register, click on https://Andes_RISC-V_CON_2022_US.eventbrite.com/?aff=PR
About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a number one provider of high-performance/low-power 32/64-bit embedded processor IP options, and the driving pressure in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ structure adopted the RISC-V as the base. Its V5 RISC-V CPU households vary from tiny 32-bit cores to superior 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual quantity of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the finish of 2021, the cumulative quantity of Andes-Embedded™ SoCs has surpassed 10 billion. For extra info, please go to https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!
